1. Field of the Invention
The present invention relates to a PCI bus control system. More particularly, the present invention relates to a PCI bus control system having a PCI bus arbiter.
2. Description of the Prior Art
When more than one bus master in a computer system simultaneously request to use a PCI bus, an arbiter selects a bus master and grants an authority to use the PCI bus to the selected bus master. Thus, the arbiter arranges the sequence to use the bus for the bus masters. Typically, in a main chip set of computer system used for the arbitration processes, a separate arbiter for each of the arbitration processes is not used in the art. On this matter, an exemplar of the contemporary practice is Heil et al. (U.S. Pat. No. 5,392,407, Multi-Port Processor With Peripheral Component Interconnect Port and RAMbus Port, Feb. 21, 1995) discussing a dual-port processor architecture with a first port interfacing to a PCI bus and a second port port interfacing to a RAMBUS channel. Pidgett et al. (U.S. Pat. No. 5,446,869, Configuration And RAM/ROM Control Of PCI Extension Card Residing On MCA Adapter Card, Aug. 29, 1995) discussing a method and apparatus for enabling configuration of a PCI daughter card resing on an MCA adapter card. A PCI/MCA bridge is provided for interfacing the MCA system bus with the PCI bus of the adapter card. Amini et al. (U.S. Pat. No. 5,450,551, System Direct Memory Access (DMA) Support Logic For PCI Based Computer System, Sep. 21, 1995) discussing computer system having a direct memory access (DMA) support mechanism. The computer system includes a central processing unit, a host bridge, an input/output bridge, and an arbitration logic circuit. Based on my study of these exemplars of the contemporary practice and the art, I believe that there is a need for an effective and improved PCI bus control system having a PCI bus arbiter.